"A 65 nm CMOS Synthesizable Digital Low-Dropout Regulator Based on ..."

Naoki Ojima et al. (2018)

> Home

Details and statistics

DOI: 10.1007/978-3-030-23425-6_1

access: closed

type: Conference or Workshop Paper

metadata version: 2019-06-26

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/vlsi/OjimaNIA18a
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/vlsi/OjimaNIA18a
Naoki Ojima, Toru Nakura, Tetsuya Iizuka, Kunihiro Asada:
A 65 nm CMOS Synthesizable Digital Low-Dropout Regulator Based on Voltage-to-Time Conversion with 99.6% Current Efficiency at 10-mA Load. VLSI-SoC (Selected Papers) 2018: 1-13

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.