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"A single-VDD ultra-low energy sub-threshold FPGA."

Rajsaktish Sankaranarayanan, Matthew R. Guthaus (2012)

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DOI: 10.1109/VLSI-SOC.2012.6379033

access: closed

type: Conference or Workshop Paper

metadata version: 2022-09-06

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  dblp key:
  - conf/vlsi/SankaranarayananG12
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  - https://dblp.org/rec/conf/vlsi/SankaranarayananG12
Rajsaktish Sankaranarayanan, Matthew R. Guthaus:
A single-VDD ultra-low energy sub-threshold FPGA. VLSI-SoC 2012: 219-224

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