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"A 2.3-MW, 950-MHz, 8-Bit Fully-Time-Based Subranging ADC Using ..."
Kenichi Ohhata (2018)
- Kenichi Ohhata:
A 2.3-MW, 950-MHz, 8-Bit Fully-Time-Based Subranging ADC Using Highly-Linear Dynamic VTC. VLSI Circuits 2018: 95-96
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