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"A 54mW 1.2GS/s 71.5dB SNDR 50MHz BW VCO-based CT ΔΣ ADC using ..."

Karthikeyan Reddy et al. (2015)

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DOI: 10.1109/VLSIC.2015.7231278

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-21

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Karthikeyan Reddy, Siladitya Dey, Sachin Rao, Brian Young, Praveen Prabha, Pavan Kumar Hanumolu:
A 54mW 1.2GS/s 71.5dB SNDR 50MHz BW VCO-based CT ΔΣ ADC using dual phase/frequency feedback in 65nm CMOS. VLSIC 2015: 256-

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