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"A 13Bit 5GS/S ADC with Time-Interleaved Chopping Calibration in 16NM FinFET."

Bruno Vaz et al. (2018)

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DOI: 10.1109/VLSIC.2018.8502306

access: closed

type: Conference or Workshop Paper

metadata version: 2018-10-30

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  - conf/vlsic/VazVECMBCWMMLPT18
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  - https://dblp.org/rec/conf/vlsic/VazVECMBCWMMLPT18
Bruno Vaz, Bob Verbruggen, Christophe Erdmann, Diarmuid Collins, John McGrath, Ali Boumaalif, Edward Cullen, Darragh Walsh, Alonso Morgado, Conrado Mesadri, Brian Long, Rajitha Pathepuram, Ronnie De La Torre, Alvin Manlapat, Georgios Karyotis, Dimitris Tsaliagos, Patrick Lynch, Peng Lim, Daire Breathnach, Brendan Farley:
A 13Bit 5GS/S ADC with Time-Interleaved Chopping Calibration in 16NM FinFET. VLSI Circuits 2018: 99-100

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