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"A Methodology for SAT-Based Electrical Error Debugging During Post-Silicon ..."

Binod Kumar, Masahiro Fujita, Virendra Singh (2019)

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DOI: 10.1109/VLSID.2019.00085

access: closed

type: Conference or Workshop Paper

metadata version: 2022-11-14

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Binod Kumar, Masahiro Fujita, Virendra Singh:
A Methodology for SAT-Based Electrical Error Debugging During Post-Silicon Validation. VLSID 2019: 389-394

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