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"COST Circuit Optimization SysTem in ASIC Library Development Environment."

C. S. Raghu et al. (1999)

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DOI: 10.1109/ICVD.1999.745198

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  dblp key:
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  persistent URL:
  - https://dblp.org/rec/conf/vlsid/RaghuBRS99
C. S. Raghu, Suravi Bhowmik, Poorvaja Ramani, S. Sundaram:
COST Circuit Optimization SysTem in ASIC Library Development Environment. VLSI Design 1999: 460-463

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