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"Latency, Power and Performance Trade-Offs in Network-on-Chips by Link ..."

Basavaraj Talwar, Shailesh Kulkarni, Bharadwaj Amrutur (2009)

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DOI: 10.1109/VLSI.DESIGN.2009.55

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Basavaraj Talwar, Shailesh Kulkarni, Bharadwaj Amrutur:
Latency, Power and Performance Trade-Offs in Network-on-Chips by Link Microarchitecture Exploration. VLSI Design 2009: 163-168

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