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"Exploring Power Savings of Gate-All-Around Cryogenic Technology."

Victor Moroz et al. (2023)

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DOI: 10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185420

access: closed

type: Conference or Workshop Paper

metadata version: 2023-07-28

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  dblp key:
  - conf/vlsit/MorozSCAL23
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  - https://dblp.org/rec/conf/vlsit/MorozSCAL23
Victor Moroz, Alexei Svizhenko, Munkang Choi, Plamen Asenov, Jaehyun Lee:
Exploring Power Savings of Gate-All-Around Cryogenic Technology. VLSI Technology and Circuits 2023: 1-2

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