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ORCID"Security Improvement of FPGA Design Against Timing Side Channel Attack ..."
Pourya Bayat-Makou, Ali Jahanian, Midia Reshadi (2018)
- Pourya Bayat-Makou, Ali Jahanian, Midia Reshadi:
Security Improvement of FPGA Design Against Timing Side Channel Attack Using Dynamic Delay Management. CCECE 2018: 1-4
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