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"A 350-mV, under-200-ppm allan deviation floor gate-leakage-based timer ..."

Atsuki Kobayashi et al. (2018)

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DOI: 10.1109/CICC.2018.8357093

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-21

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Atsuki Kobayashi, Yuya Nishio, Kenya Hayashi, Kazuo Nakazato, Kiichi Niitsu:
A 350-mV, under-200-ppm allan deviation floor gate-leakage-based timer using an amplifier-less replica-bias switching technique in 55-nm DDC CMOS. CICC 2018: 1-4

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