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"A 0.36 pJ/bit, 12.5 Gb/s forwarded-clock receiver with a sample swapping ..."
Woo-Rham Bae et al. (2014)
- Woo-Rham Bae, Gyu-Seob Jeong, Kwanseo Park, Sung-Yong Cho, Yoonsoo Kim, Deog-Kyoon Jeong:
A 0.36 pJ/bit, 12.5 Gb/s forwarded-clock receiver with a sample swapping scheme and a half-bit delay line. ESSCIRC 2014: 447-450
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