"Reducing the pressure on routing resources of FPGAs with generic logic chains."

Hadi Parandeh-Afshar et al. (2011)

Details and statistics

DOI: 10.1145/1950413.1950458

access: closed

type: Conference or Workshop Paper

metadata version: 2020-03-27

a service of  Schloss Dagstuhl - Leibniz Center for Informatics