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"Leveraging Compiler Support on VLIW Processors for Efficient Power Gating."

Juan Sebastian Piedrahita Giraldo et al. (2016)

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DOI: 10.1109/ISVLSI.2016.70

access: closed

type: Conference or Workshop Paper

metadata version: 2023-08-02

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  dblp key:
  - conf/isvlsi/GiraldoCWB16
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  persistent URL:
  - https://dblp.org/rec/conf/isvlsi/GiraldoCWB16
Juan Sebastian Piedrahita Giraldo, Luigi Carro, Stephan Wong, Antonio C. S. Beck:
Leveraging Compiler Support on VLIW Processors for Efficient Power Gating. ISVLSI 2016: 502-507

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