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"Early planning for RT-level delay insertion during clock skew-aware ..."

Keisuke Inoue, Mineo Kaneko (2011)

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DOI: 10.1109/VLSISOC.2011.6081638

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-24

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Keisuke Inoue, Mineo Kaneko:
Early planning for RT-level delay insertion during clock skew-aware register binding. VLSI-SoC 2011: 154-159

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