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"12-NM Fin-FET 3.0G-Search/s 80-Bit × 128-Entry Dual-Port Ternary CAM."

Makoto Yabuuchi et al. (2018)

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DOI: 10.1109/VLSIC.2018.8502345

access: closed

type: Conference or Workshop Paper

metadata version: 2018-10-30

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  - conf/vlsic/YabuuchiMNT18
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  - https://dblp.org/rec/conf/vlsic/YabuuchiMNT18
Makoto Yabuuchi, Masao Morimoto, Koji Nii, Shinji Tanaka:
12-NM Fin-FET 3.0G-Search/s 80-Bit × 128-Entry Dual-Port Ternary CAM. VLSI Circuits 2018: 19-20

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