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"A Novel Method to Improve the Test Efficiency of VLSI Tests."

Hailong Cui, Sharad C. Seth, Shashank K. Mehta (2002)

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DOI: 10.1109/ASPDAC.2002.994969

access: closed

type: Conference or Workshop Paper

metadata version: 2022-11-14

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  dblp key:
  - conf/vlsid/CuiSM02
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  persistent URL:
  - https://dblp.org/rec/conf/vlsid/CuiSM02
Hailong Cui, Sharad C. Seth, Shashank K. Mehta:
A Novel Method to Improve the Test Efficiency of VLSI Tests. ASP-DAC/VLSI Design 2002: 499-504

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