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"Round Addition Using Faults for Generalized Feistel Network."

Hideki Yoshikawa, Masahiro Kaminaga, Arimitsu Shikoda (2013)

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DOI: 10.1587/TRANSINF.E96.D.146

access: closed

type: Journal Article

metadata version: 2020-04-11

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  dblp key:
  - journals/ieicet/YoshikawaKS13
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  persistent URL:
  - https://dblp.org/rec/journals/ieicet/YoshikawaKS13
Hideki Yoshikawa, Masahiro Kaminaga, Arimitsu Shikoda:
Round Addition Using Faults for Generalized Feistel Network. IEICE Trans. Inf. Syst. 96-D(1): 146-150 (2013)

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