Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"C-YES: An Efficient Parametric Yield Estimation Approach for Analog and ..."

Wei Zeng et al. (2017)

> Home

Details and statistics

DOI: 10.1109/TCAD.2016.2613927

access: closed

type: Journal Article

metadata version: 2020-09-24

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tcad/ZengZZZLL17
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tcad/ZengZZZLL17
Wei Zeng, Hengliang Zhu, Xuan Zeng, Dian Zhou, Ruey-Wen Liu, Xin Li:
C-YES: An Efficient Parametric Yield Estimation Approach for Analog and Mixed-Signal Circuits Based on Multicorner-Multiperformance Correlations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(6): 899-912 (2017)

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.