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"Multilevel Cache Modeling for Chip-Multiprocessor Systems."

Pablo Prieto, Valentin Puente, José-Ángel Gregorio (2011)

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DOI: 10.1109/L-CA.2011.20

access: closed

type: Journal Article

metadata version: 2023-11-12

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  dblp key:
  - journals/cal/PrietoPG11
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  persistent URL:
  - https://dblp.org/rec/journals/cal/PrietoPG11
Pablo Prieto, Valentin Puente, José-Ángel Gregorio:
Multilevel Cache Modeling for Chip-Multiprocessor Systems. IEEE Comput. Archit. Lett. 10(2): 49-52 (2011)

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