"A bit-interleaving 12T bitcell with built-in write-assist for ..."

Dashan Shi et al. (2022)

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DOI: 10.1587/ELEX.19.20220089

access: open

type: Journal Article

metadata version: 2022-09-26

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  - https://dblp.org/rec/journals/ieiceee/ShiYYWQ22
Dashan Shi, Jia Yuan, Jialu Yin, Yulian Wang, Shushan Qiao:
A bit-interleaving 12T bitcell with built-in write-assist for sub-threshold SRAM. IEICE Electron. Express 19(10): 20220089 (2022)

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