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"A resource and timing optimized PCIe DMA architecture using FPGA internal ..."
Yingxiao Zhao, Xin Liu, Jiong Yang (2019)
- Yingxiao Zhao, Xin Liu, Jiong Yang:
A resource and timing optimized PCIe DMA architecture using FPGA internal data buffer. IEICE Electron. Express 16(1): 20180858 (2019)
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