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"Addressing Defect Coverage through Generating Test Vectors for Transistor ..."

Yoshinobu Higami et al. (2009)

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DOI: 10.1587/TRANSFUN.E92.A.3128

access: closed

type: Journal Article

metadata version: 2020-04-11

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  - journals/ieicet/HigamiSTKT09
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  persistent URL:
  - https://dblp.org/rec/journals/ieicet/HigamiSTKT09
Yoshinobu Higami, Kewal K. Saluja, Hiroshi Takahashi, Shin-ya Kobayashi, Yuzo Takamatsu:
Addressing Defect Coverage through Generating Test Vectors for Transistor Defects. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(12): 3128-3135 (2009)

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