"Scalable FPGA/ASIC Implementation Architecture for Parallel ..."

Takeshi Kumaki et al. (2007)

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DOI: 10.1093/IETISY/E90-1.1.346

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type: Journal Article

metadata version: 2020-04-11

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Takeshi Kumaki, Yutaka Kono, Masakatsu Ishizaki, Tetsushi Koide, Hans Jürgen Mattausch:
Scalable FPGA/ASIC Implementation Architecture for Parallel Table-Lookup-Coding Using Multi-Ported Content Addressable Memory. IEICE Trans. Inf. Syst. 90-D(1): 346-354 (2007)

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