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"A PND (PMOS-NMOS-Depletion MOS) Type Single Poly Gate Non-Volatile Memory ..."

Yasue Yamamoto et al. (2007)

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DOI: 10.1093/IETELE/E90-C.5.1129

access: closed

type: Journal Article

metadata version: 2024-02-05

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Yasue Yamamoto, Masanori Shirahama, Toshiaki Kawasaki, Ryuji Nishihara, Shinichi Sumi, Yasuhiro Agata, Hirohito Kikukawa, Hiroyuki Yamauchi:
A PND (PMOS-NMOS-Depletion MOS) Type Single Poly Gate Non-Volatile Memory Cell Design with a Differential Cell Architecture in a Pure CMOS Logic Process for a System LSI. IEICE Trans. Electron. 90-C(5): 1129-1137 (2007)

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