"Modular Synthesis of Timed Circuits Using Partial Order Reduction."

Tomohiro Yoneda, Eric Mercer, Chris Myers (2002)

> Home

Details and statistics

DOI: —

access: closed

type: Journal Article

metadata version: 2021-06-09

- view
  - electronic edition @ ieice.org
- export record
  dblp key:
  - journals/ieiceta/YonedaMM02
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/ieiceta/YonedaMM02
Tomohiro Yoneda, Eric Mercer, Chris Myers:
Modular Synthesis of Timed Circuits Using Partial Order Reduction. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(12): 2684-2692 (2002)

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.