"Power bumps and through-silicon-vias placement with optimised power mesh ..."

Cheoljon Jang et al. (2013)

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DOI: 10.1049/IET-CDT.2012.0047

access: closed

type: Journal Article

metadata version: 2021-02-17

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Cheoljon Jang, Jaehwan Kim, Byung-Gyu Ahn, Jongwha Chong:
Power bumps and through-silicon-vias placement with optimised power mesh structure for power delivery network in three-dimensional-integrated circuits. IET Comput. Digit. Tech. 7(1): 11-20 (2013)

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