"Fast and accurate circuit delay model for FPGA architectural exploration."

Qiang Liu, HanJing Qian (2017)

Details and statistics

DOI: 10.1049/IET-CDT.2016.0053

access: closed

type: Journal Article

metadata version: 2020-07-14

a service of  Schloss Dagstuhl - Leibniz Center for Informatics