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"Optimisation of test architecture in three-dimensional stacked integrated ..."
Surajit Kumar Roy, Chandan Giri, Hafizur Rahaman (2015)
- Surajit Kumar Roy, Chandan Giri, Hafizur Rahaman:
Optimisation of test architecture in three-dimensional stacked integrated circuits for partial stack/complete stack using hard system-on-chips. IET Comput. Digit. Tech. 9(5): 268-274 (2015)
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