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"Formal verification of SysML diagram using case studies of real-time system."

Sajjad Ali (2018)

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DOI: 10.1007/S11334-018-0318-5

access: closed

type: Journal Article

metadata version: 2020-08-13

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Sajjad Ali:
Formal verification of SysML diagram using case studies of real-time system. Innov. Syst. Softw. Eng. 14(4): 245-262 (2018)

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