"2-Bit Full Adder Implementation Using Single Spin Logic Paradigm."

Bahniman Ghosh, A. Ajay (2014)

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DOI: 10.1166/JOLPE.2014.1313

access: closed

type: Journal Article

metadata version: 2020-05-22

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  - https://dblp.org/rec/journals/jolpe/GhoshA14
Bahniman Ghosh, A. Ajay:
2-Bit Full Adder Implementation Using Single Spin Logic Paradigm. J. Low Power Electron. 10(2): 214-219 (2014)

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