"MLTimer: Leakage Power Minimization in Digital Circuits Using Machine ..."

Patanjali SLPSK et al. (2018)

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DOI: 10.1166/JOLPE.2018.1549

access: closed

type: Journal Article

metadata version: 2021-10-14

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Patanjali SLPSK, Milan Patnaik, Seetal Potluri, V. Kamakoti:
MLTimer: Leakage Power Minimization in Digital Circuits Using Machine Learning and Adaptive Lazy Timing Analysis. J. Low Power Electron. 14(2): 285-301 (2018)

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