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"FPGA implementation of compact and low-power multiplierless architectures ..."

Jhilam Jana et al. (2024)

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DOI: 10.1007/S11554-023-01396-3

access: closed

type: Journal Article

metadata version: 2024-01-19

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Jhilam Jana, Ritesh Sur Chowdhury, Sayan Tripathi, Jaydeb Bhaumik:
FPGA implementation of compact and low-power multiplierless architectures for DWT and IDWT. J. Real Time Image Process. 21(1): 19 (2024)

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