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"Architecture design of a RISC-processor for prolog."

Peter Deussen et al. (1989)

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DOI: 10.1016/0165-6074(89)90028-8

access: closed

type: Journal Article

metadata version: 2022-08-12

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  - journals/jsa/DeussenRSW89
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  - https://dblp.org/rec/journals/jsa/DeussenRSW89
Peter Deussen, Wolfgang Rosenstiel, Klaus Erik Schaufer, Jörg Wedeck:
Architecture design of a RISC-processor for prolog. Microprocessing and Microprogramming 27(1-5): 101-108 (1989)

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