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"Design-for-testability to achieve complete coverage of delay faults in ..."

Irith Pomeranz, Sudhakar M. Reddy (2001)

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DOI: 10.1016/S1383-7621(00)00054-0

access: closed

type: Journal Article

metadata version: 2020-05-19

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Irith Pomeranz, Sudhakar M. Reddy:
Design-for-testability to achieve complete coverage of delay faults in standard full scan circuits. J. Syst. Archit. 47(3-4): 357-373 (2001)

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