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"Hardware transactional memory architecture with adaptive version ..."
Jeevan Sirkunan et al. (2017)
- Jeevan Sirkunan, Chia Yee Ooi, Nasir Shaikh-Husin, Yuan Wen Hau, Muhammad N. Marsono:
Hardware transactional memory architecture with adaptive version management for multi-processor FPGA platforms. J. Syst. Archit. 73: 42-52 (2017)
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