"An all-digital phase-locked loop with 50-cycle lock time suitable for ..."

Jim Dunning et al. (1995)

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DOI: 10.1109/4.375961

access: closed

type: Journal Article

metadata version: 2023-05-03

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Jim Dunning, Gerald Garcia, Jim Lundberg, Ed Nuckolls:
An all-digital phase-locked loop with 50-cycle lock time suitable for high-performance microprocessors. IEEE J. Solid State Circuits 30(4): 412-422 (1995)

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