"A 34-ns 16-Mb DRAM with controllable voltage down-converter."

Hideto Hidaka et al. (1992)

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DOI: 10.1109/4.142597

access: closed

type: Journal Article

metadata version: 2025-02-03

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Hideto Hidaka, Kazutami Arimoto, Kazutoshi Hirayama, Masanori Hayashikoshi, Mikio Asakura, Masaki Tsukude, Tsukasa Oishi, Shinji Kawai, Katsuhiro Suma, Yasuhiro Konishi, Koji Tanaka, Wataru Wakamiya, Yoshikazu Ohno, Kazuyasu Fujishima:
A 34-ns 16-Mb DRAM with controllable voltage down-converter. IEEE J. Solid State Circuits 27(7): 1020-1027 (1992)

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