"A 65 nm Single-Chip Application and Dual-Mode Baseband Processor With ..."

Masayuki Ito et al. (2009)

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DOI: 10.1109/JSSC.2008.2007169

access: closed

type: Journal Article

metadata version: 2020-08-30

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Masayuki Ito, Kenichi Nitta, Koji Ohno, Masahito Saigusa, Masaki Nishida, Shinichi Yoshioka, Takahiro Irita, Takao Koike, Tatsuya Kamei, Teruyoshi Komuro, Toshihiro Hattori, Yasuhiro Arai, Yukio Kodama:
A 65 nm Single-Chip Application and Dual-Mode Baseband Processor With Partial Clock Activation and IP-MMU. IEEE J. Solid State Circuits 44(1): 83-89 (2009)

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