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"Notice of Violation of IEEE Publication Principles: A 0.16-2.55-GHz CMOS ..."

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DOI: 10.1109/JSSC.2004.838004

access: closed

type: Withdrawn Item

metadata version: 2022-06-08

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(Withdrawn) Notice of Violation of IEEE Publication Principles: A 0.16-2.55-GHz CMOS active clock deskewing PLL using analog phase interpolation. IEEE J. Solid State Circuits 40(1): 110-131 (2005)

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