"Correction to "A 2 Gb/s Throughput CMOS Transceiver Chipset With ..."

Toshiya Mitomo et al. (2013)

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DOI: 10.1109/JSSC.2013.2253424

access: closed

type: Journal Article

metadata version: 2023-04-04

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Toshiya Mitomo, Yukako Tsutsumi, Hiroaki Hoshino, Masahiro Hosoya, Tong Wang, Yuta Tsubouchi, Ryoichi Tachibana, Akihide Sai, Yuka Kobayashi, Daisuke Kurose, Tomohiko Ito, Koichiro Ban, Tomoya Tandai, Takeshi Tomizawa:
Correction to "A 2 Gb/s Throughput CMOS Transceiver Chipset With In-Package Antenna for 60 GHz Short-Range Wireless Communication". IEEE J. Solid State Circuits 48(6): 1540 (2013)

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