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"The impact of transistor sizing on power efficiency in submicron CMOS ..."

Robert Rogenmoser, Hubert Kaeslin (1997)

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DOI: 10.1109/4.597307

access: closed

type: Journal Article

metadata version: 2022-07-07

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  - https://dblp.org/rec/journals/jssc/RogenmoserK97
Robert Rogenmoser, Hubert Kaeslin:
The impact of transistor sizing on power efficiency in submicron CMOS circuits. IEEE J. Solid State Circuits 32(7): 1142-1145 (1997)

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