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"50-Gb/s 4-b multiplexer/demultiplexer chip set using InP HEMTs."

Kimikazu Sano et al. (2003)

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DOI: 10.1109/JSSC.2003.815923

access: closed

type: Journal Article

metadata version: 2022-04-20

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  - https://dblp.org/rec/journals/jssc/SanoMSSE03
Kimikazu Sano, Koichi Murata, Suehiro Sugitani, Hirohiko Sugahara, Takatomo Enoki:
50-Gb/s 4-b multiplexer/demultiplexer chip set using InP HEMTs. IEEE J. Solid State Circuits 38(9): 1504-1511 (2003)

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