"A 1.33-Tb 4-Bit/Cell 3-D Flash Memory on a 96-Word-Line-Layer Technology."

Noboru Shibata et al. (2020)

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DOI: 10.1109/JSSC.2019.2941758

access: closed

type: Journal Article

metadata version: 2020-08-30

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  - https://dblp.org/rec/journals/jssc/ShibataKSSYHDSN20
Noboru Shibata, Takahisa Kawabe, Taira Shibuya, Mario Sako, Kosuke Yanagidaira, Toshifumi Hashimoto, Hiroki Date, Manabu Sato, Tomoki Nakagawa, Junji Musha, Takatoshi Minamoto, Kazushige Kanda, Mizuki Uda, Dai Nakamura, Katsuaki Sakurai, Takahiro Yamashita, Jieyun Zhou, Ryoichi Tachibana, Teruo Takagiwa, Takahiro Sugimoto, Masatsugu Ogawa, Yusuke Ochi, Takahiro Shimizu, Kazuaki Kawaguchi, Masatsugu Kojima, Takeshi Ogawa, Tomoharu Hashiguchi, Ryo Fukuda, Masami Masuda, Koichi Kawakami, Tadashi Someya, Yasuyuki Kajitani, Yuuki Matsumoto, Jun Nakai, Jumpei Sato, Namasivayam Raghunathan, Yee Lih Koh, Shuo Chen, Juan Lee, Hiroaki Nasu, Hiroshi Sugawara, Koji Hosono, Toshiki Hisada, Hiroshi Nakamura, Osamu Nagao, Naoki Kobayashi, Makoto Miakashi, Yasushi Nagadomi, Tomoaki Nakano:
A 1.33-Tb 4-Bit/Cell 3-D Flash Memory on a 96-Word-Line-Layer Technology. IEEE J. Solid State Circuits 55(1): 178-188 (2020)

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