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"Drain current model for a gate all around (GAA) p-n-p-n tunnel FET."

Rakhi Narang et al. (2013)

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DOI: 10.1016/J.MEJO.2013.04.002

access: closed

type: Journal Article

metadata version: 2020-02-22

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  - journals/mj/NarangSGG13
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  - https://dblp.org/rec/journals/mj/NarangSGG13
Rakhi Narang, Manoj Saxena, R. S. Gupta, Mridula Gupta:
Drain current model for a gate all around (GAA) p-n-p-n tunnel FET. Microelectron. J. 44(6): 479-488 (2013)

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