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"Redundancy design of a wafer scale and high-speed FFT processor."

Nobuhiro Tomabechi, Shyouji Kanazawa (1997)

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DOI: 10.1002/(SICI)1520-684X(19970615)28:6<18::AID-SCJ3>3.0.CO;2-P

access: closed

type: Journal Article

metadata version: 2023-09-13

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  - https://dblp.org/rec/journals/scjapan/TomabechiK97
Nobuhiro Tomabechi, Shyouji Kanazawa:
Redundancy design of a wafer scale and high-speed FFT processor. Syst. Comput. Jpn. 28(6): 18-29 (1997)

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