"FPGA implementation of AES algorithm for high throughput using folded ..."

K. Rahimunnisa et al. (2014)

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DOI: 10.1002/SEC.651

access: closed

type: Journal Article

metadata version: 2023-09-30

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K. Rahimunnisa, P. Karthigaikumar, Soumiya Rasheed, J. Jayakumar, S. Suresh Kumar:
FPGA implementation of AES algorithm for high throughput using folded parallel architecture. Secur. Commun. Networks 7(11): 2225-2236 (2014)

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