"Acceleration of Timing-Aware Gate-Level Logic Simulation Through One-Pass ..."

Weijie Fang et al. (2025)

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DOI: 10.1109/TC.2025.3569135

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type: Journal Article

metadata version: 2025-08-09

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Weijie Fang, Yanggeng Fu, Jiaquan Gao, Longkun Guo, Gregory Z. Gutin, Xiaoyan Zhang:
Acceleration of Timing-Aware Gate-Level Logic Simulation Through One-Pass GPU Parallelism. IEEE Trans. Computers 74(8): 2675-2686 (2025)

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