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"Phased Logic Supporting the Synchronous Design Paradigm with ..."

Daniel H. Linder, James C. Harden (1996)

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DOI: 10.1109/12.537126

access: closed

type: Journal Article

metadata version: 2017-05-20

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  dblp key:
  - journals/tc/LinderH96
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  persistent URL:
  - https://dblp.org/rec/journals/tc/LinderH96
Daniel H. Linder, James C. Harden:
Phased Logic Supporting the Synchronous Design Paradigm with Delay-Insensitive Circuitry. IEEE Trans. Computers 45(9): 1031-1044 (1996)

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