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"Multiplier/Shifter Design Tradeoffs in a 32-bit Microprocessor."

Veljko M. Milutinovic, Mark Bettinger, Walter A. Helbig (1989)

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DOI: 10.1109/12.24298

access: closed

type: Journal Article

metadata version: 2017-05-20

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  dblp key:
  - journals/tc/MilutinovicBH89
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  persistent URL:
  - https://dblp.org/rec/journals/tc/MilutinovicBH89
Veljko M. Milutinovic, Mark Bettinger, Walter A. Helbig:
Multiplier/Shifter Design Tradeoffs in a 32-bit Microprocessor. IEEE Trans. Computers 38(6): 874-881 (1989)

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